Memory - Page 11

Carbon Nanotubes Can Be Used to Detect Spin

Rensselaer Polytechnic Institute researchers now believe that carbon nanotubes can be used to detect nanoscale magnetic states (Spin) by changing their conductance. They demonstrated the change by embedding tiny nanoparticles of magnetic cobalt into multi-walled carbon nanotubes.

The researchers furthermore claim that their findings could enable spintronics applications, nanoscale storage devices and ultra-sensitive conductance detectors.

Read the full story Posted: Dec 10,2008

World's First 300-mm Ready Ion Beam Deposition System for Spintronics Development

Aviza Technology, a supplier of advanced semiconductor capital equipment and process technologies for the global semiconductor industry and related markets, today announced the introduction of StratIon(TM) fxP, the world's first 300-mm ready Ion Beam Deposition system.

The first system was shipped to CEA-LETI-MINATEC in Grenoble, France, one of Europe's foremost applied research centers in electronics and Spintronics. The StratIon fxP will be used to develop next-generation magnetic tunnel junction (MTJ)-based devices for applications including MRAM, hard disk drive read heads or RF components. The system will also be used for the deposition of metal gates for advanced CMOS processes. In addition to the system shipment, Aviza and CEA-LETI have signed a three year joint development program covering the development of MTJ deposition processes for future MRAM and Spintronics devices.

The StratIon fxP system uses ion beam processing for the deposition of metal and dielectric thin films, and is the world's first ion beam deposition system for 300mm wafer manufacturing. Designed for high volume manufacturing silicon fabs, the system is based on production-proven hardware and software platforms and can be configured with three standard chamber types: preclean, oxidation and deposition. Additional Aviza deposition chambers such as atomic layer deposition (ALD) and magnetron PVD can be seamlessly added for additional flexibility. StratIon fxP offers low cost of ownership, high throughput and a smaller fab footprint compared to currently available systems used for MTJ deposition.
Read the full story Posted: Nov 06,2008

Grandis Awarded DARPA Contract To Develop STT-MRAM

Grandis announced that it has been awarded $6.0 million from the Defense Advanced Research Projects Agency (DARPA) for the initial phase of research to develop spin-transfer torque random access memory (STT-RAM) chips (for the 45 nm technology node and beyond). The total value of the effort, if all phases of the development program are completed, could be up to $14.7 million over four years.

The program will be carried out by a world-class collaboration between Grandis and the Universities of Virginia and Alabama. Under the direction of Principal Investigator Dr. Eugene Chen of Grandis, development work will cover STT materials and processes, STT architecture and circuit blocks, and ultimately test and verification of STT-RAM integrated memory arrays.
Read the full story Posted: Oct 29,2008

New phase change material could be used in Spintronics devices

A research team at Singapore A*STAR's Data Storage Institute (DSI) has invented a new phase change material that has the potential to change the design of future memory storage devices.

Phase change materials are substances that are capable of changing their structure between amorphous and crystalline at high speed. Currently, these materials are used to make Phase change memory (PCM), the most promising alternative to replace FLASH memory.

Read the full story Posted: Oct 09,2008

Hitachi and RIEC Developed 'Nonvolatile IC' using Spintronics tech based on MTJ device

Hitachi and the Tohoku University's Research Institute of Electrical Communication (RIEC) said they developed a new integrated circuit that integrates an arithmetic function and a nonvolatile memory function by using spintronics and Si technologies.

The IC is made by placing a MTJ (magnetic tunnel junction) MRAM device on a Si chip with a MOS transistor. The data transfer rate is faster, and the IC is small using that method.

The idea is that a circuit that combines memory and a arithmetic unit is faster and smaller 

The prototype chip is a full adder composed of the SUM and CARRY blocks. The SUM block measures 15.5 x 10.7?m, and the CARRY block is 13.9 x 10.7?m. The CMOS logic block was formed with Hitachi's 0.18?m process technology.

Read more here (TechOn japan)

Read the full story Posted: Aug 28,2008

Opening discussion at the International Wafer-Level Packaging Conference about IBM's RaceTrack memory

This year’s fifth annual International Wafer-Level Packaging Conference (IWLPC), October 13-16, 2008 will be the largest ever, according to Dr. Ken Gilleo, IWLPC general chair.

“Exhibitor and attendee interest has been very high, and we anticipate this year’s event will be the largest, as well as the most comprehensive, in our history,” Dr. Gilleo said. With two months to go, the 60-table exhibitor space at our Wyndham Hotel venue is nearly fully occupied.

At a special morning opening address on October 15, 2008, Dr. Stuart Parkin, a Fellow at IBM’s Almaden Research Laboratory, San Jose, California, will discuss “racetrack memory.” Dr. Parkin, a specialist in “spintronics,” will reveal how racetrack memory may lead to solid-state electronics with no moving parts, capable of holding an unparalleled amount of data.

Read the full story Posted: Aug 15,2008

Ferromagnet imaging technique could enable 'spintronic' devices

Researchers have developed a new method of studying tiny magnets that could yield high-density memory based on the emerging field of spintronics.

By implanting tiny “ferromagnets” onto processor chips, researchers expect to create small electronic devices and computers that never need to boot up. Ferromagnets are magnets made of ferrous metal such as iron, and are used in common items such as refrigerator magnets.

According to experimental physicist Chris Hammel, ferromagnets are central to incorporating memory directly into the basic logic elements at the heart of a computer.

Read more here (ITNews)

Read the full story Posted: Jul 31,2008

NVE Corporation Reports First Quarter Results

Total revenue for the first quarter of fiscal 2009 increased 3% to $4.86 million from $4.71 million in the prior-year quarter. The revenue increase was due to a 7% increase in product sales to $4.55 million for the first quarter of fiscal 2009 from $4.27 million in the prior-year quarter. Net income for the first quarter of fiscal 2009 increased 20% to $1.90 million, or $0.40 per diluted share, compared to $1.59 million, or $0.33 per diluted share, for the prior-year quarter.

"Product sales drove strong profits,'' said NVE President and Chief Executive Officer Daniel A. Baker, Ph.D. "Gross margin was 71% of revenue, operating margin 52%, pretax margin 58%, and net margin 39%.''

NVE is a leader in the practical commercialization of spintronics, a nanotechnology that relies on electron spin rather than electron charge to acquire, store and transmit information. The company manufactures high-performance spintronic products including sensors and couplers that are used to acquire and transmit data. NVE has also licensed its spintronic magnetoresistive random access memory technology, commonly known as MRAM.

Read the full story Posted: Jul 24,2008

NVE Notified of Two Spintronics Patent Grants

NVE Corporation has been notified by the U.S. Patent and Trademark Office of the expected grant today of two patents relating to spintronics.

The first patent is number 7,390,584 and titled "Spin dependent tunneling devices having reduced topological coupling." Spin-dependent tunnel junctions, also known as magnetic tunnel junctions or tunneling magnetic junctions, are spintronic structures that can form the heart of spintronic magnetoresistive random access memory technology, commonly known as MRAM.

The second patent is number 7,391,091 and titled "Magnetic particle flow detector," and is related to spintronic biosensor technology, which could be used in laboratory-on-a-chip systems.
Read the full story Posted: Jun 24,2008