November 2012

Researchers from Germany, Russia and the USA managed to the conduction electrons' spin-orbit coupling in graphene by a factor of 10,000. Such a device could could enable a spintronics switch that is controlled by a small electric field. The switch will include two perpendicular spin filters that will be controlled by the electric field.

To develop this, the researchers placed graphene on a nickel substrate in which atoms are separated by the same distance as the graphene's hexagonal meshes. They then deposited gold atoms on the device which ended up between the graphene and nickel sheets.

Researchers from Sweden, Germany and the US managed to develop an effective spin amplifier based on a non-magnetic semiconductor - that works at room temperature. The amplification occurs through deliberate defects in the form of extra gallium atoms introduced into an alloy of gallium, indium, nitrogen and arsenic.

Such a device can be used along a path of spin transport to amplify signals that have weakened along the way. By combining this with a spin detector, it may be possible to read even extremely weak spin signals.

Everspin announced that they are now sampling the world's first first ST (Spin Torque) MRAM chip. The EMD3D064M is a 64Mb DDR3 device, and select customers are already evaluation samples. Everspin is currently targeting the enterprise SSD market, to complement flash memory. Everspin is manufacturing the ST-MRAM chips on its 200mm production line in Chandler, Arizona and are working to establish 300 mm MRAM tools and additional fab capacity. The company expects the EMD3D064M to become available in 2013.

Everspin's proprietary Spin-Torque technology uses a spin-polarized current for switching. Data is stored as a magnetic state versus an electronic charge, providing a non-volatile memory bit that does not suffer wear-out or data retention issues associated with Flash technology. The EMD3D064M 64Mb ST- MRAM is functionally compatible with the industry standard JEDEC specification for the DDR3 interface, which delivers up to 1600 million transfers per second per I/O, translating to memory bandwidth of up to 3.2 GBytes/second at nanosecond class latency. The product is offered in an industry standard WBGA package aligned with the DDR3 standard.